Thinned, stackable semiconductor device having low profile

ABSTRACT

A method of manufacturing a semiconductor device, comprising preparing a semiconductor device wafer which is formed with an LSI; working the semiconductor device wafer from the back surface thereof, thereby to diminish the thickness of the semiconductor device wafer to at most 200 [μm]; forming penetrant apertures in the resulting semiconductor device wafer; forming wiring plugs ( 23  in FIG.  7 ) in the respective penetrant apertures; dicing the semiconductor device wafer, thereby to be divided into semiconductor chips ( 7 ) each of which includes the wiring plugs ( 23 ); and mounting at least two of the semiconductor chips ( 7 ) over a printed-wiring circuit board ( 25 ) through bumps ( 10 ) connected with the wiring plugs ( 23 ). Thus, the ultrathin stacked multilevel mounting of semiconductor device components can be realized at a high reliability and with a high functionality.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a semiconductor device and amanufacturing method therefor which are applied to the fabrication ofelectronic equipment. More particularly, it relates to a semiconductordevice wafer for incarnating the ultrathin and light construction ofelectronic equipment, as well as a semiconductor device having astructure in which such wafers are mounted in three dimensions (namely,in multilevel fashion), and a method of manufacturing the semiconductordevice wafer as well as the semiconductor device.

[0003] 2. Description of the Related Art

[0004] In order to promote reduction in the size of electronic equipmentstill further, it becomes an important point how the mounting density ofsemiconductor device components is heightened. Regarding alsosemiconductor ICs (integrated circuits), high-density mountingtechniques, such as flip-chip mounting, in which an LSI (large-scaleintegrated circuit) chip is directly mounted on a printed-wiring circuitboard alternatively to conventional package mounting, have beenvigorously developed in the business world.

[0005] One of connecting methods based on a flip chip is a methodwherein solder ball bumps are formed and mounted on the Al (aluminum)electrode pads of a semiconductor IC. A method of forming the solderball bumps on the predetermined electrodes, employs electroplating. Thismethod has the problem of being basically difficult to form the solderball bumps of uniform heights within an IC chip because the thickness ofa solder film to be formed is affected by slight dispersions in thesurface state and electric resistance of a subbing material layer.

[0006] Dispersion in the heights of such solder ball bumps can besuppressed by a pattern forming method which employs the formation ofthe solder film by vacuum evaporation and the lift-off of a photoresistfilm. An example of a process for forming the solder ball bumps inaccordance with this method, is illustrated in FIGS. 1A-1E of theaccompanying drawings.

[0007] FIGS. 1A-1E are sectional views showing a method of formingsolder ball bumps on Al electrode pads.

[0008] First, as shown in FIG. 1A, a film of Al—Cu (copper) alloy or thelike is deposited on a semiconductor substrate 1 of silicon or the likeby sputtering, and it is etched, whereby each Al electrode pad 2 isformed on the semiconductor substrate 1. Subsequently, the whole surfaceof the semiconductor substrate 1 including the Al electrode pads 2 iscovered with a surface protective film 3 which is made of siliconnitride, polyimide or the like, whereupon the surface protective film 3is formed by etching with each opening 3 a which overlies the electrodepad 2. Subsequently, each BLM (Ball Limiting Metal) film 4 is formed inthe opening 3 a and on the surface protective film 3 by sputtering.Thus, each joint portion of a flip-chip IC is formed. Incidentally, theBLM film 4 is a multilayer metal film which is made of at least two ofCr (chromium), Cu, Au (gold), etc.

[0009] Thereafter, as shown in FIG. 1B, a resist pattern 6 which haseach opening 5 overlying the BLM film 4 is provided on the surfaceprotective film 3. Subsequently, as shown in FIG. 1C, an evaporatedsolder film 13 is formed on the whole surface of the resulting structureincluding the interior of each opening 5 .

[0010] Thereafter, as shown in Fig. 1D, the unnecessary part of theevaporated solder film 13 is removed together with the resist pattern 6by lifting off this resist pattern 6, whereby the desired pattern of theevaporated solder film is formed on the BLM films 4. Subsequently, asshown in FIG. 1E, the solder of the evaporated solder film is molten bya heat treatment, whereby each refractory solder ball bump 14 is finallyformed on the corresponding BLM film 4.

[0011] The device chip formed with the bumps by employing the processproposed by the inventors as explained above is mounted on aprinted-wiring circuit board by flip-chip mounting. Then, a mother boardcan be made smaller than in case of mounting a conventional devicepackaged with a molding resin. Therefore, the inventors have contributedto the incarnation of the smaller and lighter constructions of variouselectronic equipment.

[0012] Nevertheless, the mounting space of a semiconductor device shouldbe reduced to the utmost for each of portable electronic equipmentincluding an IC card, a portable telephone, a PDA (Personal DigitalAssistant), etc. Accordingly, it is earnestly desired to establish astacked (or multilayer) three-dimensional (or multilevel) high-densitymounting technique which can make the semiconductor device still thinnerin the height direction thereof, in addition to two-dimensional (or areal) space saving which has heretofore been mainly aimed at.

SUMMARY OF THE INVENTION

[0013] The present invention has been made in consideration of thecircumstances as stated above, and has for its object to provide asemiconductor device and a manufacturing method therefor according towhich the stacked ultrathin three-dimensional (or multilevel) mountingof semiconductor device components can be realized at a high reliabilityand with a high functionality.

[0014] In order to accomplish the object, a method of manufacturing asemiconductor device according to the first aspect of performance of thepresent invention is characterized by comprising the step of preparinq asemiconductor device wafer which is formed with an LSI; the step ofworking the semiconductor device wafer from a back surface thereof,thereby to diminish a thickness of said semiconductor device wafer to atmost 200 [μm]; the step of forming a penetrant hole in the resultingsemiconductor device wafer; and the step of forming a wiring plug in thepenetrant hole.

[0015] A semiconductor device according to the second aspect ofperformance of the present invention is characterized by comprising asemiconductor device wafer which is formed with an LSI in its frontsurface, and which has been worked from its back surface, thereby todiminish its thickness to at most 200 [μm]; a penetrant hole which isformed in the semiconductor device wafer; and a wiring plug which isformed in the penetrant hole.

[0016] A method of manufacturing a semiconductor device according to thethird aspect of performance of the present invention is characterized bycomprising the step of preparing a semiconductor device wafer which isformed with an LSI, and an electrode pad lying at a peripheral edge ofthe LSI; the step of working the semiconductor device wafer from a backsurface thereof, thereby to diminish a thickness of said semiconductordevice wafer to at most 200 [μm]; the step of coating both a frontsurface and the back surface of the resulting semiconductor device waferwith an insulating material; the step of forming a hole which penetratesthrough coatings of the insulating material, the electrode pad and saidsemiconductor device wafer, by laser processing; and the step of forminga wiring plug for joining the front and back surfaces of saidsemiconductor device wafer, in the hole. Besides, as a working method inthe case of working the semiconductor device wafer from the backsurface, any can be employed as long as it is a working method adaptedto thin the wafer. It is favorable, however, to employ grinding,chemical mechanical polishing, or etching by way of example.

[0017] With the method of manufacturing a semiconductor device in thethird aspect, each of the surfaces of the wafer before the laserprocessing is coated with the insulating material in advance, whereby atthe step of forming the microscopic penetrant hole in the thin wafer bythe laser processing, the tapering angle of the penetrant hole can berestrained from widening at that opening end of the surfaceto-be-processed which a laser beam enters. As a result, the penetranthole having a more perpendicular (or less tapering) sectional shape canbe stably formed, and the penetrant hole joining the front surface andback surface of the wafer can be formed at a high precision. It isaccordingly possible to form the wiring plug for directly stacking andmounting the semiconductor device. It is therefore possible to mountsemiconductor device components by thin high-density mounting whichserves to incarnate the ultra-small and ultrathin implementation of anelectronic equipment.

[0018] The method of manufacturing a semiconductor device in the thirdaspect of performance should preferably further comprise after said stepof forming said hole, the step of coating both the surfaces of theresulting semiconductor device wafer with an insulating material again,thereby to fill up said hole with the insulating material, and thenforming a penetrant aperture having a diameter smaller than that of saidhole, in said insulating material contained in said hole.

[0019] With the preceding method of manufacturing a semiconductordevice, after the formation of the hole which penetrates through thesemiconductor device wafer, both the wafer surfaces are coated with theinsulating material again, thereby to fill up the hole with theinsulating material, so that the penetrant aperture being smaller indiameter than the hole can be subsequently formed in the insulatingmaterial contained in the hole. Thus, the insulating material can beleft on the inside wall of the hole so as to have a uniform thickness.Incidentally, after both the wafer surfaces have been coated with theinsulating material again, the thickness of the insulating material oneach of both the wafer surfaces is adjusted by polishing or the like asmay be needed, whereby the work of the penetrant aperture at a higherprecision can be stably carried out.

[0020] In addition, the reasons why the insulating material is left onthe inside wall of the hole at the uniform thickness are to reliablyinsulate the wiring plug and the semiconductor device wafer, when thewiring plug which joins the front surface and back surface of thesemiconductor device wafer is formed at the later step, and to reliablyprevent electric current from leaking from the wiring plugs forconnecting stacked semiconductor device chips, when the device chipshave been stacked and mounted later.

[0021] A method of manufacturing a semiconductor device according to thefourth aspect of performance of the present invention is characterizedby comprising the step of preparing a semiconductor device wafer whichis formed with an LSI, and an electrode pad lying at a peripheral edgeof the LSI; the step of working the semiconductor device wafer from aback surface thereof, thereby to diminish a thickness of saidsemiconductor device wafer to at most 200 [μm]; the step of coating botha front surface and the back surface of the resulting semiconductordevice wafer with an insulating material; the step of forming a holewhich penetrates through coatings of the insulating material, theelectrode pad and said semiconductor device wafer; the step of coatingboth the surfaces of the resulting semiconductor device wafer with aninsulating material again, thereby to fill up said hole with theinsulating material; the step of forming a penetrant aperture having adiameter smaller than that of said hole, in said insulating materialcontained in said hole, and simultaneously leaving said insulatingmaterial on an inwall of said hole; the step of forming wiring layerswhich join the interior of said penetrant aperture and the front andback surfaces of said semiconductor device wafer; and the step ofpatterning the wiring layers, thereby to form a wiring plug whichincludes respective electrode pads on said front and back surfaces ofsaid semiconductor device wafer, and which joins said front and backsurfaces of said semiconductor device wafer.

[0022] In the method of manufacturing a semiconductor device in thefourth aspect of performance, the wiring plug should preferably beformed by subjecting the semiconductor device wafer to electrolessplating and electroplating in succession.

[0023] With the preceding method of manufacturing a semiconductordevice, the thinned semiconductor device wafer is first subjected to theelectroless plating, thereby to form thin seed layers of metal (forexample, Cu) on the wafer surfaces including the inwall of the penetrantaperture. Thereafter, the resulting semiconductor device wafer issubjected to the electroplating by employing the seed layers aselectrodes, whereby the metal wiring layers are formed on the wholewafer surfaces while filling up the penetrant aperture. Besides, resistpatterns are respectively formed on the metal wiring layers bylithography, and both the wafer surfaces are subjected to etching withan etchant, whereby the wiring plug which joins both the surfaces of thesemiconductor device wafer is formed, and the electrode pads for stacked(or multilayer) mounting are formed at both the ends of the wiring plug.

[0024] In the method of manufacturing a semiconductor device accordingto the third or fourth aspect of performance of the present invention,the insulating materials should preferably be made of a liquefied resinor an organic resist material. Favorable as the liquefied resin is anepoxy type resin, a silicone type resin, a phenol type resin, or thelike.

[0025] A method of manufacturing a semiconductor device according to thefifth aspect of performance of the present invention is characterized bycomprising the step of preparing a semiconductor device wafer which isformed with an LSI; the step of working the semiconductor device waferfrom a back surface thereof, thereby to diminish a thickness of saidsemiconductor device wafer to at most 200 [μm]; the step of formingpenetrant apertures in the resulting semiconductor device wafer; thestep of forming wiring plugs in the respective penetrant apertures; thestep of dicing said semiconductor device wafer, thereby to be dividedinto semiconductor chips each of which includes the wiring plugs; andthe step of stacking and mounting at least two of the semiconductorchips over a printed-wiring circuit board through connection meansconnected with said wiring plugs.

[0026] With the method of manufacturing a semiconductor device in thefifth aspect of performance, the thinned semiconductor device wafer issplit into the semiconductor chips, and at least two of thesemiconductor chips can be stacked and mounted over the printed-wiringcircuit board. Here, it is possible in principle to stack and mount anynumber of semiconductor chips in multistage fashion. Moreover, since thechips have been subjected to the thinning work beforehand, the mountingheight of the semiconductor device can be suppressed low even when thechips are stacked in the multistage fashion. It is accordingly possibleto provide a semiconductor device module having a high functionality.

[0027] In the method of manufacturing a semiconductor device in thefifth aspect of performance, the connection means should preferably beat least one of a solder ball bump, a wire bump, an anisotropicconductive film and a conductive paste.

[0028] A semiconductor device according to the sixth aspect ofperformance of the present invention is characterized by comprising aprinted-wiring circuit board which is furnished with lands on its frontsurface; and a plurality of semiconductor chips each of which has athickness of at most 200 [μm], and which are stacked and mounted overthe printed-wiring circuit board through connection means; each of thesemiconductor chips including penetrant apertures which penetratethrough said each semiconductor chip, and wiring plugs which arerespectively formed in the penetrant apertures; the lands and the wiringplugs being electrically connected by the connection means,respectively.

[0029] By the way, the present invention is very effective formanufacturing a future semiconductor device of which a highfunctionality, a high reliability, a small size and a light weight arerequired.

BRIEF DESCRIPTION OF THE DRAWINGS

[0030] FIGS. 1A-1E are sectional views showing a method of formingsolder ball bumps on Al electrode pads;

[0031]FIG. 2 is a perspective view schematically showing a back grinderwhich is employed for the thinning grinding work of the back surface ofa silicon wafer in a method of manufacturing a semiconductor deviceaccording to the first or second embodiment of the present invention;

[0032]FIGS. 3A and 3B illustrate the situations of the grinding work ofthe back surface of the wafer by the back grinder shown in FIG. 2,wherein FIG. 3A is a sectional view showing the state in which aprotective tape is stuck on the front surface of the wafer before beingworked by the back grinder, while FIG. 3B is a sectional view showingthe state in which the flaws of the back surface of the wafer have beenremoved by the grinding with the back grinder;

[0033]FIG. 4 is a sectional view schematically showing a chemicalmechanical polisher which is employed for the finishing work of theground and thinned wafer in the method of manufacturing thesemiconductor device according to the first embodiment of the presentinvention;

[0034]FIGS. 5A thru 5D are sectional views showing the processing stepsof forming penetrant VIA wiring lines in the polished and thinnedsemiconductor device chip in the method of manufacturing thesemiconductor device according to the first or second embodiment of thepresent invention;

[0035]FIGS. 6E thru 6G illustrate the processing steps of forming thepenetrant VIA wiring lines in the polished and thinned semiconductordevice chip in the method of manufacturing the semiconductor deviceaccording to the first or second embodiment of the present invention,and they are sectional views showing the steps subsequent to the stepshown in FIG. 5D;

[0036]FIG. 7 illustrates the semiconductor device according to the firstembodiment of the present invention, and it is a sectional view showinga state where the thinned semiconductor device chips are mounted on amother board by stacked three-dimensional (or multilevel) mounting;

[0037]FIG. 8 illustrates the semiconductor device according to thesecond embodiment of the present invention, and it is a sectional viewshowing a state where thinned semiconductor device chips are mounted ona mother board by stacked three-dimensional mounting; and

[0038]FIG. 9 is a perspective sectional view schematically showing aspin etching apparatus which is employed for the finishing work of aground and thinned wafer in the method of manufacturing thesemiconductor device according to the second embodiment of the presentinvention.

PREFERRED EMBODIMENTS OF THE INVENTION

[0039] Now, the embodiments of the present invention will be describedwith reference to the drawings.

[0040]FIG. 2-FIG. 7 are views showing a method of manufacturing asemiconductor device according to the first embodiment of the presentinvention.

[0041] The first embodiment is such that the present invention isapplied to a process for mounting semiconductor device components.Concretely, it is an example in which the back surface of each siliconwafer is subjected to a thinning work by the use of grinding andchemical mechanical polishing, metal VIA wiring lines penetratingthrough the silicon wafer are thereafter laid for electrode padsarranged at the peripheral edge of an LSI, a plurality of thinsemiconductor chips are joined to each other or one another by employingsolder balls as joint means, and the joined thin semiconductor chips aremounted on a mother board by stacked (or multilayer) three-dimensional(or multilevel) mounting.

[0042] As shown in FIG. 2, first of all, a silicon device wafer 22 inwhich an LSI has been made up beforehand is prepared, and a surfaceprotective tape 15 is stuck onto that surface (front surface) of thewafer 22 over which the LSI has been made up. Thereafter, the wafer 22is set on the surface table 32 of a grinder 31. On this occasion, thewafer 22 is so set that the surface protective tape 15 comes into touchwith the surface table 32. Besides, the back surface of the siliconwafer 22 at this time (before a back-grinding work) lies in a statewhere a large number of flaws 16 are involved as shown in FIG. 3A. Theflaws 16 of the back surface are inevitably formed for the reason thatthe wafer undergoes numerous processes at its preprocessing stages formaking up the LSI.

[0043] Subsequently, while the wafer 22 is being rotated, the backsurface thereof is subjected to the back-grinding work under conditionsstated below, by a grinding wheel 18 kept rotating. Thus, as shown inFIG. 3B, the wafer 22 is ground and thinned down to a thickness of 110[μm], and the back surface flaws 16 thereof are removed by the grinding.

[0044] Feed speed of Grinding wheel: 150 [μm/min]

[0045] Rotational frequency of Grinding wheel: 2500 [r.p.m. ]

[0046] Thickness of Ground wafer: 110 [μm] (Thickness diminished byGrinding: About 510 [μm])

[0047] Thereafter, as shown in FIG. 4, the wafer 22 subjected to thethinning work is set on the wafer carrier 21 of a chemical mechanicalpolisher 34. On this occasion, the wafer 22 is so set that the surfaceprotective tape 15 comes into touch with the wafer carrier 21.

[0048] Subsequently, while the wafer 22 is being rotated, the backsurface thereof is polished as a finishing treatment under conditionsstated below, by a surface table 35 kept rotating. On this occasion, apolishing cloth 20 is stuck on the surface table 35, a polishing solventor slurry 19 is discharged onto the polishing cloth 20, and a pressureis exerted on the wafer 22 toward the surface table 35. Thus, damageshaving been formed anew on the back surface of the wafer 22 due to thegrinding are removed, and the mechanical strength of the wafer 22polished and thinned down to a thickness of 100 [μm] can be enhanced.

[0049] Rotational frequency of Wafer: 80 [r. p. m.]

[0050] Rotational frequency of Surface table: 80 [r. p. m.]

[0051] Polishing pressure: 400 [gr./cm²]

[0052] Rocking speed: 2 [mm/sec]

[0053] Supply rate of Slurry: 40 [ml./min]

[0054] Thickness diminished by Polishing: 10 [μm]

[0055] Thereafter, as shown in FIG. 5A, the surface protective tape 15is stripped from the silicon device wafer 22 having ended the thinningwork. The wafer 22 at this time lies in a state where it has been formedwith the LSI and has been polished and thinned. Next, the manufacturingmethod advances to a process for forming penetrant VIA wiring lines asillustrated in FIGS. 5A-5D and FIGS. 6E-6G. In these figures, however,the LSI made up in a silicon substrate 1 is omitted from illustration,and only the device wafer (to be divided into chips) being one unit andAl electrode pads 2 arranged at the peripheral edge of the wafer (eachchip) are depicted. Incidentally, these figures are sectional views inwhich the process for forming the penetrant VIA wiring lines in thepolished and thinned semiconductor device wafer (chips) is schematicallyshown in the sequence of the steps thereof.

[0056] Subsequently, as shown in FIG. 5B, a liquefied resin of epoxytype 8 is applied onto each of the surfaces of the silicon substrate 1to a thickness of about 20 [μm], and it is thermally cured. Thus, thewafer falls into a state where the whole surfaces thereof are coatedwith the epoxy type resin 8, which is cured.

[0057] Thereafter, as shown in FIG. 5C, each of VIA holes (penetrantholes) 8 a being about 90 [μm] in diameter, which penetrates through thecoatings of the epoxy type resin 8, the corresponding Al electrode pad 2and the thinned silicon substrate 1, is formed by laser processing withaim taken at the center of the Al electrode pad 2 arranged at theperipheral edge of the wafer (chips). A laser processing apparatus (notshown) which includes a UV-YAG (ultraviolet-yttrium aluminum garnet)laser subjected to harmonic modulation is used on this occasion. Thewavelength of the UV-YAG laser is 0.355 [μm]. It is desirable to employ,for example, a laser drill system “Model 5100” (trademark of EngravingSystem Integrators, Inc.) as the UV-YAG laser processing apparatus.

[0058] The reason why each of the surfaces of the silicon substrate 1 ispreviously coated with the liquefied resin 8 before the laserprocessing, is to restrain the tapering angle of a hole from wideningdue to the inclination of a laser beam (relative to a perpendicular lineto the surface to-be-processed) arising at that opening end of thesurface which the laser beam enters, whereby the VIA hole 8 a having amore perpendicular (or less tapering) sectional shape is formed at ahigh precision.

[0059] Subsequently, as shown in FIG. 5D, a liquefied resin of epoxytype 28 is applied onto each of the surfaces of the silicon substrate 1again so as to be thicker than 20 [μm], and it is thermally cured,whereby the VIA holes 8 a are filled up with the resin 28. That is, thewafer falls into a state where the penetrant holes 8 a are packed withthe resin 28.

[0060] Thereafter, the resulting silicon substrate 1 is set on, forexample, the chemical mechanical polisher 34 shown in FIG. 4. Besides,as shown in FIG. 6E, the epoxy type resin 28 on each of the surfaces ofthe silicon substrate 1 is partially polished away so as to be thinnedand flattened. On this occasion, the epoxy type resins 8 and 28 having atotal thickness of about 40 [μm] are left on each of the surfaces of thesilicon substrate 1.

[0061] Subsequently, as shown in FIG. 6F, each of holes is provided bylaser processing which employs the UV-YAG laser processing apparatusstated before and in which the diameter of the laser beam is reduced,with aim taken at the center of the VIA hole 8 a in which the epoxy typeresin 28 is buried. Thus, each of VIA holes 28 a, which has a diameterof about 50 [μm] and which penetrates through the epoxy type resin 28contained in the corresponding VIA hole 8 a, is formed, while at thesame time, an insulating layer, which has a thickness of about 20 [μm]and which is made of the epoxy type resin 28, is uniformly formed on theinwall of the VIA hole 8 a.

[0062] Thereafter, the wafer is subjected to electroless plating with ametal, for example, Cu so as to form seed layers on its surfaces, andthe resulting wafer is subjected to electroplating with the metal Cu byemploying the seed layers as electrodes. Thus, Cu plugs are respectivelyformed in the penetrant VIA holes 28 a. On this occasion, the Cu plugscan be respectively packed in the corresponding penetrant VIA holes 28 awithout developing voids, by optimizing the coating quantity andpolishing quantity of the epoxy type resin 28 and the beam diameter inthe laser processing beforehand.

[0063] Lastly, masks are formed on both the surfaces of the wafer bylithography, and the wafer surfaces are subjected to etching. Then, asshown in FIG. 6G, VIA metal plugs 23 penetrating through thesemiconductor device are formed in the VIA holes 28 a, and electrodepads for external connections are formed at both the ends of each of theVIA metal plugs 23.

[0064] The thinned device wafer which has been formed with the penetrantVIA wiring plugs 23 in the above way, is divided into the individualchips by dicing, whereby the thinned semiconductor device chips 7 (fourlayers as one unit by way of example) for the stacked three-dimensionalmounting are completed as seen from FIG. 7.

[0065] Thereafter, as shown in FIG. 7, solder ball bumps 10, forexample, are formed as connection means on the electrode pads of themetal wiring plugs 23. Besides, a printed-wiring circuit board (motherboard) 25 having Cu lands 11 is prepared, the semiconductor device chips7 are registered over the mother board 25, and the chip 7 of the firstlayer is mounted on the mother board 25. Thus, the solder ball bumps 10of the first-layer chip 7 are electrically connected to the respectivelycorresponding Cu lands 11 of the mother board 25.

[0066] Subsequently, the semiconductor device chip 7 of the second layeris mounted on the first-layer chip 7, the semiconductor device chip 7 ofthe third layer is mounted on the second-layer chip 7, and thesemiconductor device chip 7 of the fourth layer is mounted on thethird-layer chip 7. Thus, the metal wiring plugs 23 of the first-layerchip 7 thru the fourth-layer chip 7 are electrically connected to eachother or one another by the electrode pads and the solder ball bumps 10.In this way, the semiconductor device of very low mounting height ismounted on the mother board 25 by the stacked three-dimensionalmounting.

[0067] According to the first embodiment, it is permitted to realize thestacked ultrathin three-dimensional mounting of semiconductor devicecomponents at a high reliability and with a high functionality, and thiscan contribute to further reducing the size (or area), lightening theweight and diminishing the thickness of that product of an electronicequipment which includes the device components.

[0068] Besides, in this embodiment, the circumventive length of wiringbetween the device chips can be extraordinarily shortened as comparedwith that of wiring in the case of a conventional flat packaging circuitboard, a multilayer mounting circuit board of wire connections, or thelike. More specifically, in this embodiment, the mounting is possiblewithout leading an Au wire piece about from the electrode pad of an LSIor without interposing the lead frame of a package, and hence, theinter-chip wiring length over the circuit board in the case where thedevice chips have been mounted on the circuit board can be sharplydiminished. Therefore, this embodiment consists in the mountingtechnique which enables high-speed signal processing with a signal delaysuppressed owing to the lowered inductance of each wiring portion, whichis greatly effective to be applied to high-speed and high-frequencydevices in the future, and which can manufacture semiconductor devicecomponents of high functionality. Accordingly, regarding also thosefinal products of electronic equipment which are assembled by adoptingdevices based on the first embodiment, this embodiment can greatlycontribute to further reducing the sizes (or areas), lightening theweights and diminishing the thicknesses of portable electronic equipmentwhich include an IC card, a portable telephone, a PDA, a notebook typepersonal computer, etc.

[0069]FIG. 2, FIGS. 3A and 3B, FIGS. 5A thru 5D, FIGS. 6E thru 6G, FIG.8, and FIG. 9 are views showing a method of manufacturing asemiconductor device according to the second embodiment of the presentinvention. Incidentally, those parts of the manufacturing process in thesecond embodiment which are the same as in the first embodiment shall beomitted from description.

[0070] Likewise to the first embodiment, the second embodiment is suchthat the present invention is applied to a process for mountingsemiconductor device components. Concretely, it is an example in which,after the back surface of a silicon wafer has been subjected to athinning work by grinding and spin etching, metal VIA wiring linespenetrating through the silicon wafer are formed in electrode padsarranged at the peripheral edge of an LSI, a plurality of thinnedsemiconductor chips are joined to each other or one another by employingACFs (anisotropic conductive films) as joint means, and the resultingthinned semiconductor chips are mounted on a mother board by stacked (ormultilayer) three-dimensional (or multilevel) mounting.

[0071] As shown in FIG. 2, while a wafer 22 is being rotated, the backsurface thereof is subjected to a grinding work under conditions statedbelow, by a grinding wheel 18 kept rotating. Thus, as shown in FIG. 3B,the wafer 22 is ground and thinned down to a thickness of 150 [μm], andthe back surface flaws 16 thereof are removed by the grinding.

[0072] Feed speed of Grinding wheel: 150 [μm/min]

[0073] Rotational frequency of Grinding wheel: 2500 [r. p. m.]

[0074] Thickness of Ground wafer: 150 [μm] (Thickness diminished byGrinding: About 475 [μm])

[0075] Thereafter, the wafer 22 subjected to the thinning work is set ona wafer chuck 41 located within the process chamber 40 of a spin etchingapparatus shown in FIG. 9. While the wafer 22 is being rotated, the backsurface of the wafer 22 is supplied with, for example, a mixed solution(etchant) 24 consisting of hydrofluoric acid and nitric acid, and it isetched under conditions stated below, thereby to perform the finishingtreatment of the back surface of the wafer 22. Thus, damages having beenformed on the back surface of the wafer 22 due to the grinding areremoved, and the mechanical strength of the wafer 22 etched and thinneddown to a thickness of 100 [μm] can be enhanced.

[0076] Rotational frequency of Wafer: 2000 [r. p. m.]

[0077] Composition of Etchant: HF/HNO₃/H₂ 0=1/1/8

[0078] Supply rate of Etchant: 40 [l./min]

[0079] Thickness of Wafer diminished by Etching: 50 [μm]

[0080] Subsequently, processing steps shown in FIGS. 5A-5D and FIGS.6E-6G are carried out in the same way as in the first embodiment,thereby to fabricate a thinned device wafer for the stackedthree-dimensional mounting as has penetrant VIA wiring plugs 23.Thereafter, Au wire bumps 12 (in FIG. 8), for example, are formed asconnection means on the electrode pads of the metal wiring plugs 23.

[0081] The thinned device wafer which has been formed with the penetrantVIA wiring plugs 23 in the above way, is divided into individual chipsby dicing, whereby the thinned semiconductor device chips 7 (fourlayers) for the stacked three-dimensional mounting as shown in FIG. 8are completed.

[0082] Thereafter, as shown in FIG. 8, a printed-wiring circuit board(mother board) 25 having Cu lands 11 is prepared, and the semiconductordevice chips 7 are registered over the mother board 25. Subsequently,the chip 7 of the first layer is mounted on the mother board 25. By wayof example, ACFs (anisotropic conductive films) 9 are employed as thejoint means between the Au wire bumps 12 of the chips 7 and also betweenthe bumps 12 of the first-layer chip 7 and the Cu lands 11 of the motherboard 25 on this occasion. First, the respective bumps 12 of thefirst-layer chip 7 are electrically connected with the corresponding Culands 11 of the mother board 25 by the ACF 9.

[0083] Thereafter, the chip 7 of the second layer is mounted on thefirst-layer chip 7 through the ACF 9, the chip 7 of the third layer ismounted on the second-layer chip 7 through the ACF 9, and the chip 7 ofthe fourth layer is mounted on the third-layer chip 7 through the ACF 9.Thus, the metal wiring plugs 23 of the first-layer chip 7 thru thefourth-layer chip 7 are electrically connected to each other or oneanother by the Au wire bumps 12 and the ACFs 9. In this way, thesemiconductor device of very low mounting height is mounted on themother board 25 by the stacked three-dimensional mounting.

[0084] The second embodiment can also attain the same effects as thoseof the first embodiment.

[0085] Incidentally, the present invention is not restricted to theforegoing embodiments, but it can be performed in various modifications.By way of example, the structure and constituent materials of asemiconductor device, a processing apparatus, processing conditions,etc. can be properly chosen within a scope not departing from thepurport of the present invention.

[0086] Besides, in the first embodiment, both the surfaces of thesilicon substrate 1 are coated with the epoxy type liquefied resins 8,28, but they can be coated with an organic resist material or the like.

[0087] In addition, the first and second embodiments have been describedpremising that the manufacturing steps till the formation of thepenetrant VIA metal wiring lines are all carried out in the wafer state,but the wafer can be diced into the chips at any intermediatemanufacturing step beforehand as may be needed.

[0088] Further, in the second embodiment, the wet etching with theetchant (mixed solution) has been exemplified as the etching for thefinishing treatment of the thinned wafer, but dry etching with a halogentype gas can be performed by employing a plasma etching apparatus.

[0089] As described above, according to the present invention, asemiconductor device wafer is worked from its back surface, thereby todiminish the thickness of the semiconductor device wafer down to at most200 [μm], penetrant apertures are formed in the thinned semiconductordevice wafer, and wiring plugs are formed in the penetrant apertures. Itis accordingly possible to provide a semiconductor device and amanufacturing method therefor which can incarnate the ultrathin stacked(or multilayer) three-dimensional (or multilevel) mounting ofsemiconductor device components at a high reliability and with a highfunctionality.

What is claimed is:
 1. A method of manufacturing a semiconductor device,comprising: the step of preparing a semiconductor device wafer which isformed with an LSI; the step of working the semiconductor device waferfrom a back surface thereof, thereby to diminish a thickness of saidsemiconductor device wafer to at most 200 [μm]; the step of forming apenetrant hole in the resulting semiconductor device wafer; and the stepof forming a wiring plug in the penetrant hole.
 2. A semiconductordevice comprising: a semiconductor device wafer which is formed with anLSI in its front surface, and which has been worked from its backsurface, thereby to diminish its thickness to at most 200 [μm]; apenetrant hole which is formed in the semiconductor device wafer; and awiring plug which is formed in the penetrant hole.
 3. A method ofmanufacturing a semiconductor device, comprising: the step of preparinga semiconductor device wafer which is formed with an LSI, and anelectrode pad lying at a peripheral edge of the LSI; the step of workingthe semiconductor device wafer from a back surface thereof, thereby todiminish a thickness of said semiconductor device wafer to at most 200[μm]; the step of coating both a front surface and the back surface ofthe resulting semiconductor device wafer with an insulating material;the step of forming a hole which penetrates through coatings of theinsulating material, the electrode pad and said semiconductor devicewafer; and the step of forming a wiring plug for joining the front andback surfaces of said semiconductor device wafer, in the hole.
 4. Amethod of manufacturing a semiconductor device as defined in claim 3,further comprising after said step of forming said hole, the step ofcoating both the surfaces of the resulting semiconductor device waferwith an insulating material again, thereby to fill up said hole with theinsulating material, and then forming a penetrant aperture having adiameter smaller than that of said hole, in said insulating materialcontained in said hole.
 5. A method of manufacturing a semiconductordevice, comprising: the step of preparing a semiconductor device waferwhich is formed with an LSI, and an electrode pad lying at a peripheraledge of the LSI; the step of working the semiconductor device wafer froma back surface thereof, thereby to diminish a thickness of saidsemiconductor device wafer to at most 200 [μm]; the step of coating botha front surface and the back surface of the resulting semiconductordevice wafer with an insulating material; the step of forming a holewhich penetrates through coatings of the insulating material, theelectrode pad and said semiconductor device wafer; the step of coatingboth the surfaces of the resulting semiconductor device wafer with aninsulating material again, thereby to fill up said hole with theinsulating material; the step of forming a penetrant aperture having adiameter smaller than that of said hole, in said insulating materialcontained in said hole, and simultaneously leaving said insulatingmaterial on an inwall of said hole; the step of forming wiring layerswhich join the interior of said penetrant aperture and the front andback surfaces of said semiconductor device wafer; and the step ofpatterning the wiring layers, thereby to form a wiring plug whichincludes respective electrode pads on said front and back surfaces ofsaid semiconductor device wafer, and which joins said front and backsurfaces of said semiconductor device wafer.
 6. A method ofmanufacturing a semiconductor device as defined in claim 5, wherein saidwiring plug is formed by subjecting said semiconductor device wafer toelectroless plating and electroplating in succession.
 7. A method ofmanufacturing a semiconductor device as defined in either of claims 3and 5, wherein the insulating materials are made of a member selectedfrom the group consisting of a liquefied resin and an organic resistmaterial.
 8. A method of manufacturing a semiconductor device,comprising: the step of preparing a semiconductor device wafer which isformed with an LSI; the step of working the semiconductor device waferfrom a back surface thereof, thereby to diminish a thickness of saidsemiconductor device wafer to at most 200 [μm]; the step of formingpenetrant apertures in the resulting semiconductor device wafer; thestep of forming wiring plugs in the respective penetrant apertures; thestep of dicing said semiconductor device wafer, thereby to be dividedinto semiconductor chips each of which includes the wiring plugs; andthe step of stacking and mounting at least two of the semiconductorchips over a printed-wiring circuit board through connection meansconnected with said wiring plugs.
 9. A method of manufacturing asemiconductor device as defined in any of claims 1, 3, 5 and 8, whereina working method in the case of working said semiconductor device waferfrom said back surface is one selected from the group consisting ofgrinding, chemical mechanical polishing and etching.
 10. A method ofmanufacturing a semiconductor device as defined in claim 8, wherein theconnection means includes at least one member selected from the groupconsisting of a solder ball bump, a wire bump, an anisotropic conductivefilm and a conductive paste.
 11. A semiconductor device comprising: aprinted-wiring circuit board which is furnished with lands on its frontsurface; and a plurality of semiconductor chips each of which has athickness of at most 200 [μm], and which are stacked and mounted overthe printed-wiring circuit board through connection means; each of thesemiconductor chips including penetrant apertures which penetratethrough said each semiconductor chip, and wiring plugs which arerespectively formed in the penetrant apertures; the lands and the wiringplugs being electrically connected by the connection means,respectively.